Secure Software for the Internet of Things

Embedded XML Parser/Framer Overview

Allegro’s RomXML AE Parsing and Framing Toolkit drastically decreases the time and effort needed to implement eXtensible Markup Language (XML) in your embedded application. XML offers a processor-independent method to encode data for interchange between diverse systems and is based on a set of rules for the construction of tag-delimited information.

embedded xml parser framer

RomXML AE – Embedded XML

When designing embedded systems, it is useful to leverage standards-based technology to exchange data between your embedded device and general purpose computing desktops or workstations. Whether you are engaged in developing a unique man-machine interface or a sophisticated machine-machine interface, a standard interchange format such as XML simplifies and reduces your development efforts. However, implementing a general-purpose XML parser will likely prove to be impractical. For typical embedded applications, the tag set or schema does not change. The primary need for an embedded XML Parser or Framer is to efficiently translate data between XML syntax and internal storage (typically a C structure). The Allegro RomXML AE Parsing and Framing toolkit provides a lightweight translation between pre-defined C-language structures and XML-based representations.

XML Parsing and Framing

Within enterprise environments, there are two common methods employed for dealing with XML. One approach is a method called Simple API for XML (SAX). In the SAX approach, as a document is parsed, XML elements and attributes are passed to a user program for interpretation. The XML information and underlying structure are discarded in this parsing method once the data is passed to the user program. While this method doesn’t use much memory, it requires the user program to deal with XML in a sequential manner rather than as a whole entity. Since the XML syntax and underlying structure are discarded, SAX style parsers do not provide much support for the framing process.

embedded xml parser framer framework

The Second approach typically utilized in an enterprise environment is a method called the Document Object Model (DOM). A DOM parser recognizes that an XML document is a hierarchical data format and stores a tree structure representing both the underlying XML information and data. An API is provided to traverse the tree structure in any order and allows access to the entire XML document. Framing a new document is very straightforward since the XML data and overall structure is retained. However, the DOM method for parsing and framing documents is very memory intensive often utilizing over twice the memory of the original document. The RomXML toolkit is designed for embedded devices that have limited resources and wish to use a more powerful method than SAX, without the overhead of DOM. For embedded applications, devices do not need the ability to parse and frame general-purpose XML documents. However, embedded devices do require the ability to efficiently translate device specific data between an internal format (such as a C structure) and XML syntax. This means the schema (XML element definitions) for a given document does not change and can be specified at compile time. The RomXML AE toolkit provides a lightweight translation between pre-defined C-Language structures and XML formatted representations. This enables an embedded device to exchange data as well-formed XML documents without the overhead of general-purpose XML translators.

TagBuilder

As part of the RomXML AE toolkit, the TagBuilder compiler further decreases your development effort when utilizing XML in your embedded design. RomXML AE uses a special set of tags (RxSchema) to define an XML object. The RxSchema language allows an XML object to be defined with both C-language internal storage format and the set of XML elements and attributes used with XML-based data exchange. The TagBuilder compiler analyzes the RomXML AE RxSchema object definitions and produces an object definition file in a C-language source that is compiled with the RomXML AE Parser and Framer code. The definition file contains the transfer tables that the runtime RomXML code utilizes to perform specific translations.

Flexible Design

The RomXML AE runtime is delivered in ANSI-C, is highly portable and offers a rich API for your development team to handle XML objects. RomXML AE can handle XML datastreams transmitted with your proprietary communications methodologies or in connection with  Allegro’s Secure IoT Suite of products. When used together with the rich Allegro AE suite, web services such as SOAP and XML-RPC are also available for use in your design.

Features

Benefits

Small code footprint

More resources available for application features

ANSI C Source Code Distribution

Broad processor architecture support eases porting and support

Processor, RTOS, and TCP/IP stack agnostic

Allegro’s products will work with new or existing hardware and software designs

Interface files for leading RTOS vendors provided

Minimizes porting effort, increase time to market

Shipping in millions of products worldwide

Field-proven reliability

Pre-integrated with RomPager Embedded Web Server and RomWebClient Embedded Web Client

Save your development team time

GPL Free

No licensing or development issues related to GPL

Translate XML syntax to and from embedded internal C-language structures

Eliminates the need to design a flexible and resource sensitive XML framing and parsing framework with a proven fielded technology shipping in millions of devices worldwide

RomXML TagBuilder XML pre-compiler

Drastically reduces coding effort by analyzing object definitions and produces C-language source with structures pre-defined and ready to use with Parsing and Framing functions

 

W3C Recommendations

System Requirements

  • Processor Architecture – Works with any 16-bit, 32-bit or 64-bit processor
  • Operating System(OS) – Works with any OS vendor and will function without an OS if needed
  • TCP/IP Stack – Works with any vendor implementation
  • Filesystem – Works with any vendor implementation and will function without a filesystem if needed
  • Compiler – ANSI C

Embedded FIPS 140-2 Cryptography

FIPS 140-2 Level 2 Logo

The Allegro Cryptography Engine (ACE) is a platform independent, high performance, resource sensitive, embedded  FIPS 140-2 Validated cryptography engine specifically engineered for the rigors of embedded computing. ACE enables OEM manufacturers to add sophisticated FIPS approved encryption technology to their designs and dramatically speed the development cycle. The ACE cryptography library is designed to meet the requirements needed for FIPS 140-2 validation.

ACE

Embedded systems are appearing in virtually all industries with the capability to communicate independently. The rapid adoption and deployment of modern communication technologies have enabled new applications in healthcare, military applications, energy management, consumer devices and many other areas. With these capabilities, comes the need for embedded device security. Any network-enabled device must be considered as a potential target for malicious intent. Encryption of sensitive data while in motion or at rest is a key component to thwarting malicious attacks and reducing risk.

ACE is a cryptographic library module for embedded computing systems that provides validated software implementations of FIPS-approved algorithms for the calculation of message digests, digital signature creation and verification, bulk encryption and decryption, key generation and key exchange. Used stand-alone or pre-integrated with Allegro's Secure IoT Suite, ACE provides CAVP validated implementations of sophisticated FIPS approved encryption algorithms for use in embedded systems. In 2005, the National Security Agency (NSA) defined a set of cryptographic algorithms that when used together, are the preferred method for assuring the security and integrity of information passed over public networks such as the Internet. Today, Suite B is globally recognized as an advanced standard for cryptography that defines algorithms and strengths for encryption, hashing, calculating digital signatures and key exchange. ACE includes a platform independent, CAVP validated implementation of the NSA Suite B defined suite of cryptographic algorithms. ACE is delivered as ANSI C source.

Securing Data In Motion

Many IoT applications often collect and correlate valuable sensitive information at the edge of the Internet and routinely transmit it to servers in the cloud securely. TLS and DTLS are the “defacto” standards for keeping data secure when communicating with servers in the cloud. Allegro’s RomSTL, embedded TLS, and DTLS toolkit, tightly integrates FIPS validated cryptography with a standards-based, embedded implementation of TLS/DTLS to keep your data secure while in motion. RomTLS is additionally integrated to make use of ACE’s support of Suite B algorithms (RFC 6460).

Securing Data At Rest

Allegro’s secure data-at-rest solution is tightly integrated with ACE validated FIPS 140-2 cryptography. Before offloading data to cloud-based applications, any sensitive information stored by IoT devices faces numerous threats and risks of unintentional exposure. Adding data encryption to the transmission process has been the traditional method for reducing this risk. However, simply encrypting data transmissions doesn’t fully address many of the threats aimed at recovering small segments of data or potentially the entire collection. Allegro's Secure IoT Suite provides IoT design engineers the ability to proactively address the threat surface created when storing sensitive data on persistent media. Rather than encrypting data at a volume or drive level where exposing a single set of keys potentially compromises a significant amount of sensitive data, Allegro’s secure data-at-rest solution encrypts information at the file level.

ACE can be used stand-alone or pre-integrated with Allegro’s Secure IoT Suite.

TM: A Certification Mark of NIST, which does not imply product endorsement by NIST, the U.S. or Canadian Governments

ACE - FIPS Mode

 

Digital Signature Algorithms

  • RSA (FIPS 186-4) Key lengths: 2048, 3072
    • Padding Modes: ANSI X9.31, PKCS #1v1.5, PSS
  • DSA (FIPS 186-4) Key lengths: 2048, 3072
  • ECDSA (FIPS 186-4) Curves: NIST P-224, P-256, P-384, P-521

Symmetric Keys

  • AES Key lengths: 128, 192, 256
    • Modes: ECB, CBC, CTR, CFB1, CFB8, CFB128, OFB, CCM
  • AES-GCM Key lengths: 128, 192, 256
  • AES-XTS Key lengths: 128, 256
  • TripleDES
    • Modes: ECB, CBC, CFB1, CFB8, CFB64, OFB

Hash Functions

  • SHA-1
  • SHA-224
  • SHA-256
  • SHA-384
  • SHA-512
  • SHA3-224
  • SHA3-256
  • SHA3-384
  • SHA3-512

Message Authentication

  • HMAC-SHA-1
  • HMAC-SHA-224
  • HMAC-SHA-256
  • HMAC-SHA-384
  • HMAC-SHA-512
  • AES-GMAC Keylengths: 128, 192, 256
  • AES-CMAC Keylengths: 128, 192, 256

Key Agreement

  • DH (NIST SP 800-56A)
  • ECDH Curves: NIST P-224, P-256, P-384, P-521

Key Derivation

  • Password-Based Key Derivation Function 2 (PBKDF2)
  • TLS Key Derivation Functions

Random Number Generator

  • DRBG (NIST SP 800-90B)

 

ACE - Non-FIPS Mode

All of the above in addition to the following:

 

Digital Signature Algorithms

  • RSA: arbitrary key lengths 1024, 2048, 3072
  • DSA: arbitrary key lengths 1024, 2048, 3072

Symmetric Keys

  • DES
  • RC4

Hash Functions

  • MD2
  • MD4
  • MD5

Message Authentication

  • HMAC-MD5

 

 

Features

Benefits

Small code footprint

More resources available for application features

ANSI C Source Code Distribution

Broad processor architecture support, eases porting and support

Processor, RTOS and TCP/IP stack agnostic

Allegro's products will work with new or existing hardware and software designs

Flexible Security and External Security support

Use software encryption or if available make use of hardware cryptography acceleration

Compilation switches for size, feature and speed trade-offs

Allows the development team to optimize for system resources

Supported RFCs

System Requirements

  • Processor Architecture - Works with any 16-bit, 32-bit or 64-bit processor
  • Operating System(OS) - Works with any OS vendor and will function without an OS if needed
  • Compiler - ANSI C

NIST CVMP Validation Reference

FIPS 140-2 Level 2 Logo

Validated FIPS FIPS 140-2 Cryptographic Modules

 

Certificate Number Status NIST Link
3432 Active NIST Reference
2966 Active NIST Reference
2048 Historical NIST Reference

CAVP Validation References

 

AES Validation

Validation Number Date
AES 5574 7/27/2018
AES 5573 7/27/2018
AES 4121 10/14/2016
AES 2671 11/8/2013
AES 2314 1/18/2013
AES 2271 11/15/2012

 

DSA Validation

Validation Number Date
DSA 1116 10/14/2016
DSA 810 11/8/2013
DSA 728 1/18/2013
DSA 708 11/15/2012

 

RSA Validation

Validation Number Date
RSA 3000 7/27/2018
RSA 2999 7/27/2018
RSA 2227 10/14/2016
RSA 1374 11/8/2013
RSA 1197 1/8/2013
RSA 1164 11/15/2012

 

ECDSA Validation

Validation Number Date
ECDSA 1505 7/27/2018
ECDSA 1504 7/27/2018
ECDSA 936 10/14/2016
ECDSA 465 11/8/2013
ECDSA 379 1/18/2013
ECDSA 367 11/15/2012

 

Triple-DES

Validation Number Date
TDES 2251 10/14/2016
TDES 1602 11/8/2013
TDES 1459 1/18/2013
TDES 1418 11/15/2012

 

SHA Validation

Validation Number Date
SHS 4478 7/27/2018
SHS 4477 7/27/2018
SHS 3390 10/14/2016
SHS 2243 11/8/2013
SHS 1997 1/8/2013
SHS 1952 11/15/2012

 

ECC Component Validations

Validation Number Date
Component 2005 7/27/2018
Component 2004 7/27/2018
Component 927 10/14/2016
Component 148 11/8/2013
Component 50 1/8/2013
Component 43 11/15/2012

 

DRBG Validation

Validation Number Date
DRBG 2224 7/27/2018
DRBG 2223 7/27/2018
DRBG 1241 10/14/2016
DRBG 430 11/8/2013
DRBG 286 1/8/2013
DRBG 279 11/15/2012

 

SHAKE/SHA-3 Validation

Validation Number Date
SHA-3 8 7/27/2018

 

KDF TLS Validation

Validation Number Date
Component 2062 9/7/2018
Component 2061 9/7/2018
Component 1074 1/27/2017

 

KAS FFC Validation

Validation Number Date
Component 927 10/14/2016
Component 148 11/8/2013
Component 43 11/15/2012

 

KAS ECC Validation

Validation Number Date
Component 2005 7/27/2018
Component 2004 7/27/2018
Component 927 10/14/2016
Component 148 11/8/2013
Component 50 1/8/2013
Component 43 11/15/2012

 

HMAC SHA2 Validation

Validation Number Date
HMAC 3715 7/27/2018
HMAC 3714 7/27/2018
HMAC 2692 10/14/2016
HMAC 1661 11/8/2013
HMAC 1430 1/8/2013
HMAC 1390 11/15/2012

 

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